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Infineon Adds to Its Core Processor Design Portfolio

Announces Floating Point Unit for TriCore Unified Processor Architecture

MUNICH, Germany--(BUSINESS WIRE)--July 8, 2002--Infineon Technologies (FSE/NYSE: IFX), a leading provider of system-on-chip semiconductors for automotive, industrial and communication applications, announced that it has added a floating-point unit (FPU) to its library of system design blocks supporting the TriCore(TM) Unified Processor Architecture. The FPU will enhance the performance of TriCore processor-based system designs requiring precision numeric calculations, such as dynamic vehicle control systems, printers and applications executing MPEG compression algorithms.

The TC1-FPU is a high-performance, low-power, small-area co-processor block designed for integration with Infineon"s TC1MP-S, a fully synthesizable processor core. It supports floating-point operations compatible with the IEEE-754-1985 standard for binary floating-point arithmetic.

"The addition of a floating-point block to the TC1MP core library will enable our customers to create single-chip systems with calculating power that meets the demands of applications requiring superior dynamic range," said Walter Croce, Director of Marketing for TriCore Products. "This marks an important step in the development of Infineon"s embedded control portfolio, providing system designers with greater flexibility to produce high-performance solutions for advanced embedded systems."

The TC1-FPU supports the IEEE-754 single-precision floating-point number format and all defined rounding modes. As well as the normal set of arithmetic operations, it supports Multiply-Accumulate (MAC) instructions, which provides two benefits to the user: enhanced performance by executing two floating point operations per instruction; and simple implementation of optimized scientific library functions through the enhanced precision gained by eliminating a rounding step.

The dedicated floating-point instructions exhibit low execution latency and instruction formats consistent with the existing RISC instruction set of the TriCore family. The instruction formats are easy to exploit by both compiler writers and the optimized assembly libraries required in the embedded processor product space. The TC1-FPU is capable of operation at the maximum frequency supported by the TC1MP-S core, which can be as high as 250 MHz.

"Infineon"s goals for the TriCore architecture include scaling the performance of both the TC1 and new TC2 Unified Processor cores to meet market requirements for increasing computing power with the low power and compact size that only come from high integration," said Croce. "To support this goal, an FPU of similar design and execution capability will be made available to for the TriCore 2 architecture to support even more powerful microcontroller designs in the future."

The TC1-FPU is now available for licensing by qualified parties as a soft-macro co-processor for the TriCore TC1MP-S core, requiring approximately 23,000 logic gates. It is fully supported in the TriCore Unified Processor tool chain. The first silicon implementation incorporating the TC1-FPU, an advanced microcontroller operating in the 150 MHz range under automotive environmental conditions, is planned to be available by the end of 2002.

The TriCore Unified Processor architecture is designed to seamlessly combine RISC, microcontroller and DSP functionality in one core. It executes both microcontroller and digital signal processing tasks, providing distinct performance advantages in embedded system applications. The architecture is especially well-suited for applications demanding real-time performance, such as automotive and industrial control, mass storage and communications. It provides system designers with programming advantages while reducing system memory requirements, which helps to save total cost or to support added capability without increasing cost. The TC1MP-S has been implemented in more than a dozen processor designs for applications ranging from fixed base stations and mobile terminals for next-generation cellular, data storage, integrated access devices for broadband networks, industrial control and automotive engine management.

About Infineon

Infineon Technologies AG, Munich, Germany, offers semiconductor and system solutions for applications in the wired and wireless communications markets, for security systems and smartcards, for the automotive and industrial sectors, as well as memory products. With a global presence, Infineon operates in the US from San Jose, CA, in the Asia-Pacific region from Singapore and in Japan from Tokyo. In the fiscal year 2001 (ending September), the company achieved sales of Euro 5.67 billion with about 33,800 employees worldwide. Infineon is listed on the DAX index of the Frankfurt Stock Exchange and on the New York Stock Exchange (ticker symbol: IFX).

Further information is available at www.infineon.com

Infineon and the stylized Infineon Technologies design are registered trademarks and service marks of Infineon Technologies AG. Other product and brand names may be trademarks or registered trademarks of their respective owners.

This news release is available online at www.infineon.com/news


Contact:
     Infineon Technologies
     Worldwide Headquarters
     Monika Sonntag, +49 89 234 24497 / 28482
     monika.sonntag@infineon
           or
     Toni Goodrich, +1 408 501 6382 / 2424 (U.S.A.)
     toni.goodrich@infineon.com
           or
     Kaye Lim, +65 6840 0689 / 0073 (Asia)
     kaye.lim@infineon.com
           or
     Hirotaka Shiroguchi, +81 3 5449 6795 / 6401  (Japan)
     hirotaka.shiroguchi@infineon.com
           or
     Investor Relations, +49 89 234 26655 / 26155
     investor.relations@infineon.com

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